电子设计自动化中英文对照外文翻译文献

2021年1月25日发(作者：bldg)

中英文对照外文翻译文献


(
文档含英文原文和中文翻译
)






Electronic Design Automation
EDA
(Electronic
Design
Automation)
technology
is
a
new
technology
of
the
modern
field
of
electrical
engineering,
which
provides
computer-based
information
technology
and
the
methods
of
circuit
design.
EDA
technology
development
and
application of greatly promoted the development of the electronics industry. With the
development of EDA technology, hardware design of electronic circuits can rely on
almost
all
computers
to
accomplish,
thus
greatly
shortening
the
cycle
of
hardware
electronic circuit design, enabling manufacturers to quickly develop a variety of small
quantities of products to meet the market demand. EDA technology, the basic idea is
the
help
of
computers,
the
EDA
software
platform
to
complete
electronic
circuit
design, simulation and PCB design of the entire process. For more complex circuits, if
necessary, can be used to implement
programmable logic devices. EDA
technology
not only on the Electronic Course and analysis of simulation experiments to address
the variety of laboratory components, specifications and quantity restrictions are not
sufficient
to
avoid
damage
to
the
students
in
the
lab
components
and
devices
to
stimulate interest in learning, to develop their analysis, electronic product design and
development
ability,
but
also
e-workers
to
design,
develop
a
powerful
tool
for
electronic products. Thinking of EDA technology education and industry promotion is
a
technology
hot
spot
in
today's
world,
EDA
technology
is
indispensable
in
the
modern electronics industry to a technology. EDA technology has a broad meaning,
but
also
a
progressive
development
of
the
field
has
a
strong
vitality.
Today's
EDA
technology
has
reached
a

on
a
chip
(SOC,
System
On
Chip)
stage.
Developers
can
use
the
powerful
EDA
design
software,
the
use
of
IP
(Intellectual
Property) IP core, coupled with his innovative thinking, and build their own custom
chips,
which
have
their
own
IP
rights
to
design
specific
integrated
circuit
(ASIC,
Application
Specific
IC .)
EDA
technology
in
the
popularity
of
teaching,
practical
applications
based
on
programmable
device
technology,
which
includes
four
basic
conditions:
①

large-scale
programmable
devices,
it
is
the
use
of
EDA
techniques
carrier
electronic system design;
②

hardware
description
language
It
is
the
use
of
EDA
technologies
for
electronic system design, the main means of expression;
③
software development tools, it is the use of EDA technologies for intelligent
electronic system design automation design tools.
④
experimental development
system,
which is
the use of EDA technology for
electronic systems Download tools and hardware design verification tools.
Programmable Logic Control (CPLD / FPGA)
In our design, we was selected CPLD / FPGA, as compared with the traditional
MCU has many advantages, mainly in the following areas:
①
advanced programming very easy. CPLD / FPGA products, part of the daisy
chain
in- system
programming
mode.
This
advanced
method
of
programming
has
become
the
world's
development
trend
of
various
types
of
programmable
devices.
Because it obviates the expensive and inconvenient operation dedicated programmer,
just
need
to
download
a
very
simple
programming
circuit
and
a
PC,
printer
communication cable on the line. It is not programmed pressure, the TTL level line
can
be
programmed
at
any
time,
and
the
so-called
multi-chip
daisy
chain
serial
programming.
Its
programming
up
to
1
million
times,
such
as
Lattice's
isles
and
AMD's
MACH
family.
In
addition,
programming
can
easily
achieve
infrared,
ultrasonic
or
radio
programming
programmer,
or
through
the
telephone
line
remote
online
programming.
These
features
are
in
communication
devices
and
military
special purpose devices.
②
high speed. CPLD / FPGA clock delay of up to ns level, combined with the
parallel
work,
in
the
ultra
high-speed
real-time
monitoring
and
control
applications
and
has
a
very
broad
application
prospects.
If
you
use
the
FLEX10K50
ALTERA
development network image through USB interface, real-time encryption / decryption
ASIC system, carried out in FLEX10K50 up to 56-bit parallel binary arithmetic, each
encryption / decryption cycle of only a few μs, and the MCU takes nearly 1 minute .
Another example is in the mold manufacturing EDM processing, motor control, the
effective o
peration of the processing parts from only a few μs, which is required for
the control of sensitive and high-speed circuit feeding service, not a short circuit or
arcing is less than the breakdown . Obviously, this work, MCU is difficult to directly
participate.
If
direct
feeding
by
ispLSI1032
service
control,
feeding
on
the
closed-
loop motor speed service, the use of sampling ispLSI direct control of the AD1674, 8-
bit accuracy using a maximum speed of 8μs / each, in order to achieve a good closed
-
loop speed control of synchronous and .
③

high
reliability.
In
high
reliability
applications,
MCU's
shortcomings
as
a
CPLD /
FPGA application left a lot of useless.
Although the function of this group
developed
the
device
is
achieved
through
the
EDA
software.
But
the
physical
mechanism like a 74LS164 as purely a hardware circuit is very reliable. Through the
rational
design
of
most
applications,
no
need
to
consider
the
complex
reset
and
initialization. Design using a simple statement just idle initial entry into the same, we
can
effectively
prevent
any
possible

phenomenon.
Because
it
is
working
in
parallel, it can be used as either input pin interrupt monitoring is similar to pin MCU,
and the reaction rate is only satisfied wonderful class. CPLD / FPGA, high reliability
is also reflected in almost the entire system can be downloaded on the same chip, thus
greatly reducing the volume, easy to manage and shielding.
④
powerful, applications are broad. Currently, CPLD / FPGA to select a large
range,
according
to
different
applications
use
different
capacity
chips,
such
as
Lattice's ispLSI and AMD's MACH, the smallest chip for the 1000 equivalent logic
gates,
the
largest
of
several
one
hundred
thousand .
ALTERA
and
XILINX
gate
introduced millions of CPLD / FPGA can achieve almost any form of digital circuits
or
digital
systems
design.
With
the
wide
application
of
such
devices
and
the
cost
dropped significantly, and the market rate increase, CPLD / FPGA in the system rate
is almost equal to the direct application of ASIC development.
⑤
easy to
use, develop
convenient. The design
of SCM experts in
application
system is very simple. However, for beginners, such as the CPU's work, many of the
usage
of
special
registers,
interrupt
concepts,
etc.,
really
is
not
an
easy
task.
In
contrast, CPLD / FPGA application does not require too much preparation to learn the
knowledge, as long as a little bit of design of digital circuits and computer software
basics, you can in the short term to handle basic design and development skills. And
in turn, to learn to use SCM, it appeared hundreds of times more. This is undoubtedly
high for us to provide a shortcut to learning, standing on the shoulders of giants, of
course faster to be successful. It can be predicted, the study of EDA technology boom
and the CPLD / FPGA application boom never inferior to boom over the past 10 years,
single chip.
⑥
short development cycle. EDA software features as the corresponding sound
and powerful, convenient and real-time simulation capabilities, and intuitive image of
the development process, and the hardware factors involved very little, it can be very
complicated in
a very short time the system
design, which is
the product
to
market
quickly
the
most
valuable
features.
Some
EDA
experts
predict,
the
future
of
large-
scale systems of CPLD / FPGA design is just all kinds of logic and then apply the IP
core (CORE) of the assembly, the design cycle, only
hour.
TI
company that eighty
percent of an ASIC IP core features available such as ready-made logic synthesis.
pment of language VHDL
VHDL (Very High Speed Integrated Circuit Hardware Description Language) is
a very high speed integrated circuit hardware description language, it can describe the
function of the hardware circuitry, signal connectivity and the time between languages.
It can be more effective than the circuit diagram to express the characteristics of the
hardware
circuit.
Using
the
VHDL
language,
you
can
proceed
to
the
general
requirements of the system, since the detailed content will be designed to come down
to
earth,
and
finally
to
complete
the
overall
design
of
the
system
hardware.
IEEE
VHDL
language
has
been
the
industry
standard
as
a
design
to
facilitate
reuse
and
sharing the results. At present, it can not be applied analog circuit design, but has been
put
into
research.
VHDL
program
structure,
including:
entity
(Entity),
structure
(Architecture),
configure
(Configuration),
Package
Collection
(Package)
and
the
Library (Library). Among them, the entity is the basic unit of a VHDL program, by
entity
and
the
structure
of
two
parts:
the
physical
design
system
that
is
used
to
describe the external
interface signal; structure used to
describe the behavior of the
system, the system processes or system data structure form. Configuration select the
required
language
from
the
library
system
design
unit
to
form
different
versions
of
different
specifications,
so
that
the
function
is
designed
to
change
the
system.
Collection of records of the design module package to share the data types, constants,
subroutines and so on. Database used to store the compiled entities, the body structure,
including
the
collection
and
configuration:
one
is
the
development
of
engineering
software user, the other is the manufacturer's database.
VHDL, the main features are:
①
powerful, high flexibility: VHDL language is a powerful language structure,
clear and concise code can be used to design complex control logic. VHDL language
also
supports
hierarchical
design,
support
design
databases
and
build
reusable
components. Currently, VHDL language has become a design, simulation, synthesis
of standard hardware description language.
②
Device independence: VHDL language allows designers to generate a design
do not need to first select a specific device. For the same design description, you can
use
a
variety
of
different
device
structures
to
achieve
its
function.
So
the
design
description stage, able to focus on design ideas. When the design, simulation, after the
adoption of a specific device specified integrated, adapter can be.
③

Portability:
VHDL
language
is
a
standard
language,
so
the
use
of
VHDL
design
can
be
carried
out
by
different
EDA
tool
support.
Transplanted
from
one
to
another
simulation
tools
simulation
tools,
synthesis
tools
from
a
port
to
another
integrated tool,
from
a
working platform
into another working platform. EDA tools
used in a technical skills, in other tools can also be used.
④

top-down
design
methods:
the
traditional
design
approach
is
bottom-up
design
or
flat
design.
Bottom-up
design
methodology
is
to
start
the
bottom
of
the
module design, the gradual formation of the functional modules of complex circuits.
Advantage
of
this
design
is
obvious
because
it
is
a
hierarchical
circuit
design,
the
general circuit sub-module are in accordance with the structure or function of division,
so
the
circuit
level
clear,
clear
structure,
easy
people
to
develop,
while
the
design
archive
file
is
easy,
easy
communication.
Bottom-up
design
is
also
very
obvious
shortcomings,
the
overall
design
concept
is
often
not
leaving
because
the
cost
of
months of low-level design in vain. Flat design is a module containing only the circuit,
the circuit design is straightforward and, with no division structure and function, it is
not hierarchical circuit design. Advantages of small circuit design can save time and
effort,
but
with
the
increasing
complexity
of
the
circuit,
this
design
highlights
the
shortcomings of the abnormal changes. Top-down design approach is to design top-
level
circuit
description
(top
model),
and
then
the
top-level
simulation
using
EDA
software, if the top-level design of the simulation results meet the requirements, you
can
continue
to
lower
the
top-level
module
by
the
division
level
and
simulation,
design of such a level
will eventually
complete the entire circuit. Top-down design
method compared with the first two are obvious advantages.
⑤
rich data types: as a hardware description language VHDL data types are very
rich language, in addition to VHDL language itself dozens of predefined data types, in
the VHDL language programming also can be user-defined data types. Std_logic data
types
in
particular the use of VHDL language can make the most realistic complex
signals in analog circuits.
⑥
modeling convenience: the VHDL language can be integrated in the statement
and the statement are available for simulation, behavior description ability, therefore
particularly
suitable
for
signal
modeling
language
VHDL.
The
current
VHDL
synthesizer
to
complex
arithmetic
comprehensive
descriptions
(such
as:
Quartus
Ⅱ

2.0 and above versions of std_logic_vector type of data can add, subtract, multiply,
divide), so the circuit modeling for complex simulation of VHDL language, whether
or comprehensive description of the language are very appropriate.
⑦
rich runtime and packages: The current package supports VHDL, very rich,
mostly in the form of libraries stored in a specific directory, the user can at any time.
Such
as
the
IEEE
library
collection
std_logic_1164,
std_logic_arith,
std_logic_unsigned
other
package.
In
the
CPLD
/
FPGA
synthesis,
EDA
software
vendors can also use the various libraries and provide package. VHDL language and
the
user
using
a
variety
of
results
can
be
stored
in
a
library,
in
the
design
of
the
follow-up can continue to use.
⑧

VHDL
language
is
a
modeling
hardware
description
language,
so
with
ordinary
computer
languages
are
very
different,
common
computer
language
is
the
CPU clock according to the beat, after an instruction to perform the next instruction,
so
instruction
is
a
sequential,
that
is
the
order
of
execution,
and
execution
of
each
instruction
takes
a
specific
time.
VHDL
language
to
describe
the
results
with
the
corresponding hardware circuit, which follows the characteristics of hardware, there is
no order of execution of the statement is executed concurrently; and statements that
do not like ordinary software, take some time each instruction, just follow their own
hardware delay.
2. Development Environment MAX + PLUS
Ⅱ
/ QUARTER
Ⅱ

Altera
Corporation
is
the
world's
three
major
CPLD
/
FPGA
manufacturers
of
the devices it can achieve the highest performance and integration, not only because
of
the
use
of
advanced
technology
and
new
logic
structure,
but
also
because
it
provides
a
modern
design
tools
MAX
+
PLUS
Ⅱ
programmable
logic
development
software,
the
software
is
launched
the
third
generation
of
Altera
PLD
development
system.
Nothing
to
do
with
the
structure
provides
a
design
environment
for
Altera
CPLD
designers
to
easily
design
entry,
quick
processing,
and
device
programming.
MAX + PLUS
Ⅱ
provides a comprehensive logic design capabilities, including circuit
diagrams,
text
and
waveform
design
entry
and
compilation,
logic
synthesis,
simulation
and
timing
analysis,
and
device
programming,
and
many
other
features.
Especially in the schematic so, MAX + PLUS
Ⅱ
is considered the most easy to use,
the
most
friendly
man-machine
interface
PLD
development
software.
MAX
+
PLUS
Ⅱ
can develop anything other than the addition APEX20K CPLD / FPGA.
MAX + PLUS
Ⅱ
development system has many outstanding features:
①

open interface.
②

design
and
construction
related:
MAX
+
PLUS
Ⅱ
support
Altera's
Classic,
ACEX
1K,
MAX
3000,
MAX
5000,
MAX
7000,
MAX
9000,
FLEX
6000,
FLEX
8000 and FLEX 10K series of programmable logic devices, gate count is 600 ~ 250
000
doors,
offers
the
industry
really
has
nothing
to
do
with
the
structure
of
programmable
logic
design
environment.
MAX
+
PLUS
Ⅱ
compiler
also
provides
a
powerful logic synthesis and optimization to reduce the burden on the user's design.
③

can
be
run
on
multiple
platforms:
MAX
+
PLUS
Ⅱ
software
PC-based
WindowsNT
4.0,
Windows
98,
Win
dows
2000
operating
systems,
but
also
in
Sun
SPARCstations,
HP
9000
Series
700/800,
IBM
RISC
System/6000
such
as
run
on
workstations.
④

fully
integrated:
MAX
+
PLUS
Ⅱ
software
design
input,
processing,
calibration functions are fully integrated within the programmable logic development
tools, which can be debugged more quickly and shorten the development cycle.
⑤

modular
tools:
designers
can
input
from
a
variety
of
design,
editing,
calibration
and
programming
tools
to
choose
the
device
to
form
a
user-style
development
environment,
when
necessary,
to
retain
on
the
basis
of
the
original
features to add new features. The MAX + PLUS
Ⅱ
Series supports a variety of devices,
designers
need
to
learn
new
development
tools
for
the
development
of
new
device
structures.
⑥

mail-description
language
(HDL):
MAX
+
PLUS
Ⅱ
software
supports
a
variety
of
HDL
design
entry,
including
the
standard
VHDL,
Verilog
HDL
and
Altera's own developed hardware description language AHDL.
⑦

MegaCore
Function:
MegaCore
are
pre-validated
for
the
realization
of
complex system-level functions provided by the HDL netlist file. It ACEX 1K, MAX
7000, MAX 9000, FLEX 6000, FLEX 8000 and FLEX 10K devices provide the most
optimal design. Users can purchase them from the Altera MegaCore, using them can
reduce
the
design
task,
designers
can
make
more
time
and
energy
to
improve
the
design and final product up.
⑧

OpenCore
Features:
MAX
+
PLUS
Ⅱ
software
with
open
characteristics
of
the kernel, OpenCore come to buy products for designers design their own assessment.
At the same time, MAX + PLUS
Ⅱ
there are many other design entry methods,
including:
①

graphic
design
input:
MAX
+
PLUS
Ⅱ
graphic
design
input
than
other
software easier to
use features, because the MAX + PLUS
Ⅱ
provides
a
rich library
unit
for
the
designer
calls,
especially
in
the
MAX2LIB
in
the
provision
of
the
mf
library includes almost all 74 series of devices, in the prim library provides all of the
separate
digital
circuit
devices.
So
long
as
a
digital
circuit
knowledge,
almost
no
learning
can
take
advantage
of
excess
MAX
+
PLUS
Ⅱ
for
CPLD
/
FPGA
design.
MAX + PLUS
Ⅱ
also includes a variety of special logic macros (Macro-Function) and
the
parameters
of
the
trillion
of
new
features
(Mega-Function)
module.
Full
use
of
these
modules
are
designed
to
greatly
reduce
the
workload
of
designers
to
shorten
design cycles and multiply.
②

Enter
the
text
editor:
MAX
+
PLUS
Ⅱ
text
input
language
and
compiler
system
supports
AHDL,
VHDL
language,
VERILOG
language
of
the
three
input
methods.
③

wave input: If you know the input, output waveform, the waveform input can
also be used.